Flip-chip mounting is one method for mounting a semiconductor element on a wiring substrate. In flip-chip mounting, the semiconductor element is connected to the wiring substrate, for example, by bumps formed on pads of the wiring substrate. An example of a method for manufacturing bumps will now be described.
As illustrated in FIG. 18A, a wiring substrate includes an insulation layer 100 and pads 101, which are embedded in the insulation layer 100. The insulation layer 100 covers the entire side surfaces of the pads 101. The insulation layer 100 also includes an upper surface 100A, which is substantially flush with upper surfaces 101A of the pads 101.
As illustrated in FIG. 18B, a resist layer 102 is formed on the upper surface 100A of the insulation layer 100. The resist layer 102 includes openings 102X, which partially expose the upper surfaces 101A of the pads 101. Then, an electrolytic plating process is performed using the resist layer 102 as a plating mask to form bumps 103 on the pads 101 exposed from the openings 102X.
As illustrated in FIG. 18C, the resist layer 102, which is illustrated in FIG. 18B, is removed. The above steps form the bumps 103 on the pads 101.
Japanese Laid-Open Patent Publication Nos. 2007-103878 and 2005-327780 describe the structure of such bumps.
As illustrated in FIG. 18C, the bumps 103 are projected from the upper surface 100A of the insulation layer 100 and entirely exposed to the exterior. Thus, the bumps 103 easily receive external force such as contact force and may be deformed by the external force prior to the mounting of a semiconductor element. The deformation of the bumps 103 may adversely affect the connection reliability between connection terminals of the semiconductor element and the bumps 103.